M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 315

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 291 of 587
Figure 17.54
17.2.2.1 Baud Rate
Table 17.26
17.2.2.2 LSB First or MSB First
Baud Rate
Target
(bps)
(1) When the UFORM bit in the UiC0 register (i = 5, 6) is set to 0 (LSB first)
(2) When the UFORM bit is set to 1 (MSB first)
14400
19200
28800
31250
38400
51200
The above applies under the following conditions:
ST: Start bit
P: Parity bit
SP: Stop bit
In UART mode, the baud rate is the clock frequency divided by the setting value of the UiBRG register
(i = 5 and 6) and again divided by 16. Table 17.26 lists an example of baud rate setting.
As shown in Figure 17.54, the UFORM bit in the UiC0 register (i = 5 and 6) determines a bit order. This
function is can be used when data length is 8 bits long.
1200
2400
4800
9600
RXDi
TXDi
RXDi
- UiC0 register: CKPOL bit = 0 (transmit data output at the falling edge and receive data input at the rising edge of the serial clock)
TXDi
UiBRG
Source
"H"
"L"
"H"
"L"
"H"
"L"
"H"
"L"
Count
Baud Rate
Bit Order
f8
f8
f8
f1
f1
f1
f1
f1
f1
f1
Setting Value:
Actual baud rate =
Peripheral Clock: 16MHz
ST
ST
ST
ST
UiBRG
103(67h)
103(67h)
31(1Fh)
n
51(33h)
25(19h)
68(44h)
51(33h)
34(22h)
25(19h)
19(13h)
D7
D0
D0
D7
Actual Baud
D1
D1
D6
D6
(bps)
Rate
16 × (UiBRG register setting value + 1)
14493
19231
28571
31250
38462
50000
D5
D5
D2
D2
1202
2404
4808
9615
UiBRG register count source
Setting Value:
D4
D4
D3
D3
Peripheral Clock: 24MHz
UiBRG
155(9Bh)
155(9Bh)
103(67h)
77(4Dh)
77(4Dh)
28(1Ch)
47(2Fh)
38(26h)
51(33h)
38(26h)
n
D3
D4
D4
D3
D2
D5
D5
D2
Actual Baud
17. Serial Interfaces (UART5 and UART6)
(bps)
Rate
D6
D6
D1
D1
14423
19231
28846
31250
38462
51724
1202
2404
4808
9615
D0
D0
D7
D7
Setting Value:
Peripheral Clock: 32MHz
UiBRG
207(CFh)
207(CFh)
138(8Ah)
103(67h)
103(67h)
P
P
P
P
63(3Fh)
51(33h)
68(44h)
51(33h)
38(26h)
n
SP
SP
SP
SP
Actual Baud
(bps)
Rate
14388
19231
28986
31250
38462
51282
1202
2404
4808
9615