M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 216

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 192 of 587
Figure 15.28
15.2.2
Table 15.10
NOTE:
Count source
Count operation
Number of counting
Count start condition
Count stop condition
Interrupt request generation timing When the timer underflows
TBiIN pin function
Read from timer
Write to timer
1. Wait for one or more count source cycles to write after the count starts.
Contents of the counter
n = contents of the reload
register
Input to the TBiIN pin
TBiS bit in the TABSR or TBSR
regsiter
IR bit in the TBiIC regsiter
In event counter mode, the timer counts overflows/underflows of another timer, or the external pulses.
Table 15.10 lists specifications of event counter mode. Figure 15.28 shows an event counter mode operation.
i = 0 to 5
(Condition) TBiMR register: Bits TMOD1 and TMOD0 are set to 01b (event counter mode)
Event Counter Mode
Item
Specifications of Event Counter Mode
Operation in Event Counter Mode (Timer B)
FFFFh
0000h
“H”
“L”
Bits MR1 and MR0 are set to 00b (count the falling edge of the external signal)
The TCK1 bit is set to 0 (signal input to TBiIN pin)
1
0
1
0
n
• External signal applied to the TBiIN pin (i = 0 to 5) (valid edge can be selected
• TBj overflows or underflows (j = i - 1, except j = 2 if i = 0, j = 5 if i = 3)
• Counter decrements
(n + 1) times
The TBiS bit in the TABSR or TBSR register is set to 1 (count starts)
The TBiS bit is set to 0 (count stops)
Count source input
A read from the TBi register returns a counter value.
• A write to the TBi register while the count is stopped:
• A write to the TBi register while counting:
Count starts
by a program)
The value is written to both the reload register and the counter.
The value is written to the reload register (It is transferred to the counter at the
next reload timing).
When the timer underflows, the contents of the reload register are reloaded into
the counter and the count continues.
(1)
n: Setting value of the TBi register 0000h to FFFFh
Set to 0 by an interrupt request acknowledgement or by a program
Reload
Underflow
Specification
Count stops
Count resumes
15. Timer B