M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 624

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
REVISION HISTORY
Date
451-453
454-458
459,460
462-463
464-466
467,468
469-481
489-493
494-519
502-504
Page
418
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459
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501
511
514
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CAN Module
• Figure 23.10 added
• Figure 23.22 Descriptions in function fields partially modified
• Figures 23.28 and 23.29 partially modified
• Figure 23.30 Descriptions in Function fields and NOTE partially modified
• Table 23.4 Structure partially modified
• 23.1.20.2 TRMACTIVE/INVALDATA Bit Text partially modified
• Subsections 23.1.21.1 and 23.1.21.2 Text partially modified
• 23.2 CAN Clock and CPU Clock Title and structure partially modified, a
• 23.3 Setting and Timing in CAN-Associated Registers Title partially
• Figures 23.38 to 23.40 partially modified
• 23.4 CAN Interrupts Structure partially modified, Figure 23.42 partially
Real-Time Port (RTP)
• Text partially modified, Specification table deleted
• Figure 24.1 and 24.3 partially modified
• Figure 24.2 Register name and bit name partially revised
• Table 24.1 NOTE 1 added,
Programmable I/O Ports
• Text partially modified
• Figures 25.1 to 25.3 partially modified
• Figure 25.5 and 25.6 Descriptions in Function field and NOTE partially
• Figures 25.7 to 25.19 Bit name and descriptions in Function fields partially
• Figure 25.14 PSL5 register added
• Figure 25.15 PSL7 register added
• Figure 25.24 Descriptions in Function fields partially modified
• Tables 25.1 and 25.2 AVCC and AVSS deleted,
• Tables 25.3 to 25.13 partially modified
Flash Memory
• Text partially modified
• Tables 26.1 and 26.2 Structure, text, and NOTE partially modified
• Figure 26.1 Title and NOTE partially modified
• Figure 26.2 Bit name, descriptions in Function fields, and NOTE partially
• Figure 26.3 partially modified
• Table 26.3 Structure, title, text, and NOTE partially modified
• Figure 26.5 Value after reset revised
• Figures 26.6 to 26.8 Flow chart and NOTE partially modified
• Subsection Precautions in CPU Rewrite Mode moved to 28. Usage
• Table 26.5 D0 to D7 are changed to b7 to b0 respectively, Table 26.6 Text
• Table 26.7 Structure and text partially modified
• Subsection ID Code Verify Function deleted
modified
Notes
partially modified
table and a figure deleted
modified
modified, Figures 23.41 , 23.43, tables 23.5 , and 23.6 added
RTP-Associated Register Settings Table deleted
modified
modified
Figure 25.26 Partially modified
M32C/87 Group Hardware Manual
C - 13
Description
Summary