M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 327

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 303 of 587
18.1.3
Table 18.6
Function
Analog input pins
Start condition
Stop condition
Interrupt request generation timing • DMAC operating mode is not used (DUS bit in the AD0CON3 register = 0):
Reading A/D conversion result
In single sweep mode, analog voltage that is applied to multiple selected pins is converted to a digital code once
for each pin.
Table 18.6 lists specifications of single sweep mode.
Single Sweep Mode
Item
Single Sweep Mode Specifications
Analog voltage applied to selected pins is converted once for each pin
Select one of the following.
• 2 pins (ANi_0 and ANi_1) (i = none, 0, 2, 15)
• 4 pins (ANi_0 to ANi_3)
• 6 pins (ANi_0 to ANi_5)
• 8 pins (ANi_0 to ANi_7)
The following register settings determine which pins are used:
• Bits SCAN1 and SCAN0 in the AD0CON1 register
• Bits APS1 and APS0 in the AD0CON2 register
Software trigger is selected (TRG bit in the AD0CON0 register = 0):
• the ADST bit in the AD0CON0 register is set to 1 (A/D conversion starts)
External trigger, hardware trigger is selected (TRG bit = 1):
• TRG0 bit in the AD0CON2 register = 0
• TRG0 bit = 1
• A sequence of A/D conversions is completed (the ADST bit becomes 0 when
• Set the ADST bit to 0 by a program (A/D conversion stops)
• DMAC operating mode is used (DUS bit = 1):
• DMAC operating mode is not used (DUS bit = 0):
• DMAC operating mode is used (DUS bit = 1):
The falling edge is detected on the ADTRG pin after the ADST bit is set to 1
Timer B2 interrupt request of three-phase motor control timer function (after
the ICTB2 register completes counting) is generated after the ADST bit is set
to 1.
software trigger is selected)
Interrupt request is generated after a sequence of A/D conversions is
completed.
Interrupt request is generated every time each A/D conversion is completed
Read the AD0j register (j = 0 to 7) corresponding to a selected pin by a
program.
A/D conversion result is stored into the AD00 register after A/D conversion is
completed. Then, DMAC transfers the data from the AD00 register to a given
memory space. (Refer to 13. DMAC for DMAC settings)
Specification
18. A/D Converter