R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 1008

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 25 Audio Codec Interface (HAC)
Figure 25.1 shows a block diagram of the HAC.
25.2
Table 25.1 describes the HAC pin configuration.
Table 25.1 Pin Configuration
Note: These pins are multiplexed with the SIOF, SSI and GPIO pins.
Rev.1.00 Dec. 13, 2005 Page 956 of 1286
REJ09B0158-0100
Pin Name
HAC_BITCLK
HAC_SDIN
HAC_SDOUT
HAC_SYNC
HAC_RES
HAC_SDIN
HAC_BITCLK
HAC_SDOUT
HAC_SYNC
HAC_RES
Input/Output Pins
request signal
Slot3, slot4
Shift register for slot 1
Shift register for slot 2
Shift register for slot 3
Shift register for slot 4
Shift register for slot 1
Shift register for slot 2
Shift register for slot 3
Shift register for slot 4
Input
Input
Output
Output
Output
I/O
HAC transmitter
HAC receiver
Figure 25.1 Block Diagram
Bit control signal
HAC serial data clock
HAC serial data incoming to Rx frame
HAC serial data outgoing from Tx frame
HAC frame sync
HAC reset (negative logic signal)
Function
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Contlol
Contlol
signal
signal
Internal bus interface
Internal bus interface
CSAR RX buffer
CSDR RX buffer
PCML RX buffer
PCMR RX buffer
CSAR TX buffer
CSDR TX buffer
PCML TX buffer
PCMR TX buffer
(Transmssion)
(Reception)
DMA control
DMA control
Interrupt request
Interrupt request
DMA request
DMA request
Data[31:0]
Data[31:0]