R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 267

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
PURGE transaction: When the operand cache is enabled, the PURGE transaction checks the
operand cache and invalidates the hit entry. If the invalidated entry is dirty, the data is written back
to the external memory. If the transaction is not hit to the cache, it is no-operation.
FLUSH transaction: When the operand cache is enabled, the FLUSH transaction checks the
operand cache and if the hit line is dirty, then the data is written back to the external memory.
If the transaction is not hit to the cache or the hit entry is not dirty, it is no-operation.
8.5.2
This LSI supports a prefetch instruction to reduce the cache fill penalty incurred as the result of a
cache miss. If it is known that a cache miss will result from a read or write operation, it is possible
to fill the cache with data beforehand by means of the prefetch instruction to prevent a cache miss
due to the read or write operation, and so improve software performance. If a prefetch instruction
is executed for data already held in the cache, or if the prefetch address results in a UTLB miss or
a protection violation, the result is no operation, and an exception is not generated. Details of the
prefetch instruction are given in the Software Manual.
• Prefetch instruction (OC)
• Prefetch instruction (IC)
Prefetch Operation
: PREF @Rn
: PREFI @Rn
Rev.1.00 Dec. 13, 2005 Page 215 of 1286
Section 8 Caches
REJ09B0158-0100

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