R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 497

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Figure 13.1 is a block diagram of the PCIC.
The PCIC comprises two blocks: the PCI bus interface and SuperHyway bus interface block.
The PCI bus interface block comprises the PCI configuration register, local register, PCI master,
and PCI target controller.
The functions of the PCI bus interface are transaction control on the PCI local bus.
The SuperHyway bus interface block comprises the control register (PCIECR) and the data FIFO.
The functions of the SuperHyway bus interface are access translation between the PCI bus
interface and the CPU or DMAC via SuperHyway bus.
The interrupt controller requests interrupt request to the INTC of this LSI.
SHck
(SuperHyway bus clock)
SuperHyway bus
[Legend]
PCIECR: PCI enable control register
PCIC
SuperHyway bus
Interrupt control
Figure 13.1 PCIC Block Diagram
32-Byte × 2
32-Byte × 2
Data FIFO
Data FIFO
(2 planes)
(2 planes)
Interface
PCIECR
PCI standard signal
PCI local bus
Target control
Configuration/local
Master control
Register control
(PCI bus access control)
PCI bus Interface
register
Rev.1.00 Dec. 13, 2005 Page 445 of 1286
PCIRESET
Section 13 PCI Controller (PCIC)
PCICLK
(PCI bus clock)
REJ09B0158-0100
Host/normal
MODE6