R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 108
![IC SUPERH MPU ROMLESS 449-BGA](/photos/12/46/124616/r8a77800anbgav_sml.jpg)
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 108 of 1342
- Download datasheet (7Mb)
Section 3 Instruction Set
Note: For the addressing modes below that use a displacement (disp), the assembler descriptions
Rev.1.00 Dec. 13, 2005 Page 56 of 1286
REJ09B0158-0100
Addressing
Mode
PC-relative
Immediate
in this manual show the value before scaling (×1, ×2, or ×4) is performed according to the
operand size. This is done to clarify the operation of the LSI. Refer to the relevant
assembler notation rules for the actual assembler descriptions.
@ (disp:4, Rn)
@ (disp:8, GBR) ; GBR indirect with displacement
@ (disp:8, PC)
disp:8, disp:12
Instruction
Format
disp:12
Rn
#imm:8
#imm:8
#imm:8
; PC-relative with displacement
; PC-relative
; Register indirect with displacement
Effective Address Calculation Method
Effective address is PC + 4 with 12-bit
displacement disp added after being sign-extended
and
multiplied by 2.
Effective address is sum of PC + 4 and Rn.
8-bit immediate data imm of TST, AND, OR, or
XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
CMP/EQ instruction is sign-extended.
8-bit immediate data imm of TRAPA instruction is
zero-extended and multiplied by 4.
(sign-extended)
disp
PC
PC
Rn
4
2
4
+
×
+
+
+
PC + 4 + disp × 2
PC + 4 + Rn
Calculation
Formula
PC + 4 + disp
× 2 → Branch-
Target
PC + 4 + Rn →
Branch-Target
—
—
—
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