R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 580
![IC SUPERH MPU ROMLESS 449-BGA](/photos/12/46/124616/r8a77800anbgav_sml.jpg)
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 580 of 1342
- Download datasheet (7Mb)
Section 13 PCI Controller (PCIC)
(3)
Access within the size of 4-byte.
Burst I/O transfers are not supported.
The PCI I/O address space is allocated from H'FD20 0000 to H'FE3F FFFF (2 Mbytes).
Address translation from SuperHyway bus to PCI local bus
The lower 15 bits ([17:3]) of a SuperHyway bus address are sent without translation.
Bits 20 to 18 of a SuperHyway bus address are controlled by the PCI I/O bank mask register
(PCIIOBMR).
Note: In the following item and figure, “SH” means the SuperHyway bus of this LSI and “PCI”
• PCIIOMR0 [20:18] B'111: PCI address [20:18] = SH address [20:18]
• PCIIOMR0 [20:18] B'011: PCI address [20:18] = PCIIOBR [20], SH address [19:18]
• PCIIOMR0 [20:18] B'001: PCI address [20:18] = PCIIOBR [20:19], SH address [18]
• PCIIOMR0 [20:18] B'000: PCI address [20:18] = PCIIOBR [20:18]
The upper 11 bits ([31:21]) of a SuperHyway bus address are replaced with bits 31 to 21 in the
PCI I/O bank register (PCIIOBR).
Rev.1.00 Dec. 13, 2005 Page 528 of 1286
REJ09B0158-0100
Accessing PCI I/O Space
SH address
PCIIOBMR
means the PCI local bus.
Figure 13.6 SuperHyway Bus to PCI Local Bus Address Translation (PCI I/O)
31
11111110001
31
21 20 18 17
21 20 18 17
IOBAM
mask
0
0
PCI address
PCIIOBR
31
31
29 28
29 28
PIOSBA
18 17
18 17
0
0
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