R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 779

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

20.4
Examples of the use of the RTC are shown below.
20.4.1
Figure 20.2 shows examples of the time setting procedures.
The procedure for setting the time after stopping the clock is shown in figure 20.2 (a). The
programming for this method is simple, and it is useful for setting all the counters, from second to
year.
The procedure for setting the time while the clock is running is shown in figure 20.2 (b). This
method is useful for modifying only certain counter values (for example, only the second data or
hour data). If a carry occurs during the write operation, the write data is automatically updated and
there will be an error in the set data. The carry flag should therefore be used to check the write
status. If the carry flag (RCR1.CF) is set to 1, the write must be repeated.
The interrupt function can also be used to determine the carry flag status.
Operation
Time Setting Procedures
Yes
(b) Setting time while clock is running
Figure 20.2 Examples of Time Setting Procedures
(a) Setting time after stopping clock
Set second/minute/hour/day/
day-of-week/month/year
Write to counter register
Reset frequency divider
Start clock operation
Clear carry flag
Carry flag = 1?
Stop clock
No
Set RCR2.RESET to 1.
Clear RCR2.START to 0.
In any order.
Set RCR2.START to 1.
Clear RCR1.CF to 0
(Write 1 to RCR1.AF so that alarm flag
is not cleared).
Set RYRCNT first and RSECCNT last.
Read RCR1 register and check CF bit.
Rev.1.00 Dec. 13, 2005 Page 727 of 1286
Section 20 Realtime Clock (RTC)
REJ09B0158-0100