R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 1011

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

To place the off-chip codec device into the power-down mode, write 1 to bit 12 of the register
index 26 in the off-chip codec via the HAC. When entering the power-down mode, the off-chip
codec stops HAC_BITCLK and suspends the normal operation. The off-chip codec acts in the
same manner at power-on. To resume the normal operation, perform a cold reset or a warm reset
on the off-chip codec.
Bit
10
9
8 to 6
5
4 to 0
Bit Name
WMRT


ST

Initial
Value
0
1
All 0
0
All 0
R/W
W
R
R
W
R
Description
HAC Warm Reset
Use a warm reset only after power-up, or only to exit
from the power-down mode by the power-down
command.
[Write]
0: Always write 0 to this bit before writing 1 again.
1: Performs a warm reset on the HAC.
[Read]
Always read as 0.
Reserved
Always 1 for read and write.
Reserved
Always 0 for read and write.
Start Transfer
[Write]
1: Starts data transmission/reception.
0: Stops data transmission/reception at the end of the
[Read]
Always read as 0.
Reserved
Always 0 for read and write.
current frame. Do not take this action to terminate
transmission/reception in normal operation.
Rev.1.00 Dec. 13, 2005 Page 959 of 1286
Section 25 Audio Codec Interface (HAC)
REJ09B0158-0100