R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 118

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 3 Instruction Set
Table 3.9
Rev.1.00 Dec. 13, 2005 Page 66 of 1286
REJ09B0158-0100
Instruction
CLRMAC
CLRS
CLRT
ICBI
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDS
LDS
LDS
LDS.L
LDS.L
LDS.L
LDTLB
MOVCA.L R0,@Rn
@Rn
Rm,SR
Rm,GBR
Rm,VBR
Rm,SGR
Rm,SSR
Rm,SPC
Rm,DBR
Rm,Rn_BANK
@Rm+,SR
@Rm+,GBR
@Rm+,VBR
@Rm+,SGR
@Rm+,SSR
@Rm+,SPC
@Rm+,DBR
@Rm+,Rn_BANK (Rm) → Rn_BANK,
Rm,MACH
Rm,MACL
Rm,PR
@Rm+,MACH
@Rm+,MACL
@Rm+,PR
System Control Instructions
Operation
0 → MACH, MACL
0 → S
0 → T
Invalidates instruction cache
block indicated by virtual
address
Rm → SR
Rm → GBR
Rm → VBR
Rm → SGR
Rm → SSR
Rm → SPC
Rm → DBR
Rm → Rn_BANK (n = 0 to 7)
(Rm) → SR, Rm + 4 → Rm
(Rm) → GBR, Rm + 4 → Rm
(Rm) → VBR, Rm + 4 → Rm
(Rm) → SGR, Rm + 4 → Rm
(Rm) → SSR, Rm + 4 → Rm
(Rm) → SPC, Rm + 4 → Rm
(Rm) → DBR, Rm + 4 → Rm
Rm + 4 → Rm
Rm → MACH
Rm → MACL
Rm → PR
(Rm) → MACH, Rm + 4 → Rm 0100mmmm00000110 —
(Rm) → MACL, Rm + 4 → Rm 0100mmmm00010110 —
(Rm) → PR, Rm + 4 → Rm
PTEH/PTEL → TLB
R0 → (Rn) (without fetching
cache block)
Instruction Code
0000000000101000 —
0000000001001000 —
0000000000001000 —
0000nnnn11100011 
0100mmmm00001110 Privileged LSB —
0100mmmm00011110 —
0100mmmm00101110 Privileged —
0100mmmm00111010 Privileged —
0100mmmm00111110 Privileged —
0100mmmm01001110 Privileged —
0100mmmm11111010 Privileged —
0100mmmm1nnn1110 Privileged —
0100mmmm00000111 Privileged LSB —
0100mmmm00010111 —
0100mmmm00100111 Privileged —
0100mmmm00110110 Privileged —
0100mmmm00110111 Privileged —
0100mmmm01000111 Privileged —
0100mmmm11110110 Privileged —
0100mmmm1nnn0111 Privileged —
0100mmmm00001010 —
0100mmmm00011010 —
0100mmmm00101010 —
0100mmmm00100110 —
0000000000111000 Privileged —
0000nnnn11000011 —
Privileged T Bit New
—
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0

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New
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New
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New
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