R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 828

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 21 Serial Communication Interface with FIFO (SCIF)
(4)
Figure 21.9 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Rev.1.00 Dec. 13, 2005 Page 776 of 1286
REJ09B0158-0100
Serial Data Transmission (Asynchronous Mode):
Write transmit data in SCFTDR,
Read TEND flag in SCFSR
Clear TE bit in SCSCR to 0
Read TDFE flag in SCFSR
TEND flag in SCFSR to 0
and clear TDFE flag and
Clear SPB2DT to 0 and
Start of transmission
All data transmitted?
End of transmission
Figure 21.9 Sample Serial Transmission Flowchart
set SPB2IO to 1
Break output?
TEND = 1?
TDFE = 1?
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[1] SCIF status check and transmit data
[2] Serial transmission continuation
[3] Break output at the end of serial
write:
write:
Read SCFSR and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR, and clear
the TDFE and TEND flags to 0.
The number of transmit data bytes
that can be written is 64 - (transmit
trigger set number).
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR, and then clear the TDFE
flag to 0.
transmission:
To output a break in serial
transmission, clear the SPB2DT bit to
0 and set the SPB2IO bit to 1 in
SCSPTR, then clear the TE bit in
SCSCR to 0.
In [1] and [2], it is possible to
ascertain the number of data bytes
that can be written from the number
of transmit data bytes in SCFTDR
indicated by SCTFDR.