R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 927

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

24.3.4
CSTR indicates the MMCIF status during command sequence execution.
Bit
7
6
5
Card Status Register (CSTR)
Bit Name
BUSY
FIFO_FULL 0
FIFO_EMPTY
Initial value:
Initial
Value
0
0
R/W:
Bit:
BUSY
R
7
0
R/W
R
R
R
FIFO_
FULL
6
0
R
Description
Command Busy
Indicates command execution status. When the
CMDOFF bit in OPCR is set to 1, this bit is cleared to 0
because the MMCIF command sequence is aborted.
0: Idle state waiting for a command, or data busy state
1: Command sequence execution in progress
FIFO Full
This bit is set to 1 when the FIFO becomes full while
data is being received from the card, and cleared to 0
when RD_CONTI is set to 1 or the command sequence
is completed.
Indicates whether the FIFO is empty or not.
0: The FIFO is empty.
1: The FIFO is full.
FIFO Empty
This bit is set to 1 when the FIFO becomes empty while
data is being sent to the card, and cleared to 0 when
DATA_EN is set to 1 or the command sequence is
completed.
Indicates whether the FIFO holds data or not.
0: The FIFO includes data.
1: The FIFO is empty.
EMPTY
FIFO_
R
5
0
CWRE
4
0
R
DTBUSY
Section 24 Multimedia Card Interface (MMCIF)
R
3
0
DTBUSY
Rev.1.00 Dec. 13, 2005 Page 875 of 1286
_TU
—
2
R
—
R
1
0
REQ
R
0
0
REJ09B0158-0100