R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 680

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 16 Watchdog Timer and Reset
16.3
Table 16.2 shows the registers of the reset and watchdog timer. Table 16.3 shows the register
states in each processing mode.
Table 16.2 Register Configuration
Table 16.3 Register States in Each Processing Mode
Rev.1.00 Dec. 13, 2005 Page 628 of 1286
REJ09B0158-0100
Register Name
Watchdog timer stop time register WDTST
Watchdog timer control/status
register
Watchdog timer base stop time
register
Watchdog timer counter
Watchdog timer base counter
Register Name
Watchdog timer stop time register WDTST
Watchdog timer control/status
register
Watchdog timer base stop time
register
Watchdog timer counter
Watchdog timer base counter
Register Descriptions
Abbreviation R/W
WDTCSR
WDTBST
WDTCNT
WDTBCNT
Abbreviation
WDTCSR
WDTBST
WDTCNT
WDTBCNT
R/W
R/W
R/W
R
R
Power-on
Reset by
PRESET Pin
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
P4 Address
H'FFCC 0000
H'FFCC 0004
H'FFCC 0008
H'FFCC 0010
H'FFCC 0018
Power-on
Reset by
WDT/H-UDI
Retained
Retained
Retained
Retained
Retained
Area 7
Address
H'1FCC 0000
H'1FCC 0004
H'1FCC 0008
H'1FCC 0010
H'1FCC 0018
Manual
Reset by
WDT/
Multiple
Exception
Retained
Retained
Retained
Retained
Retained
Access
Size
32
32
32
32
32
Sleep
by SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Sync
Clock
Pck
Pck
Pck
Pck
Pck