R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 775

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

20.3.17 RTC Control Register 2 (RCR2)
RCR2 is an 8-bit readable/writable register used for periodic interrupt control, 30-second
adjustment, and frequency divider RESET and RTC count control.
RCR2 is basically initialized to H'09 by a power-on reset, except that the value of the PEF bit is
undefined. In a manual reset, bits other than RTCEN and START are initialized, while the value
of the PEF bit is undefined. In standby mode RCR2 is not initialized, and retains its current value.
Bit
0
Bit Name
AF
Initial value:
Undefined R/W
Initial
Value
R/W:
BIt:
R/W
PEF
—
7
R/W
R/W
6
0
Description
Alarm Flag
Set to 1 when the alarm time set in those registers
among RSECAR, RMINAR, RHRAR, RWKAR,
RDAYAR, and RMONAR in which the ENB bit is set to
1 matches the respective counter values
0: Alarm registers and counter values do not match
[Clearing condition]
When 0 is written to AF
1: Alarm registers and counter values match*
[Setting condition]
When alarm registers in which the ENB bit is set to 1
and counter values match*
Note: * Writing 1 does not change the value.
PES[2:0]
R/W
5
0
(Initial value)
R/W
4
0
RTCEN
R/W
3
1
Rev.1.00 Dec. 13, 2005 Page 723 of 1286
R/W
ADJ
2
0
RESET
R/W
1
0
Section 20 Realtime Clock (RTC)
START
R/W
0
1
REJ09B0158-0100