R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 840
![IC SUPERH MPU ROMLESS 449-BGA](/photos/12/46/124616/r8a77800anbgav_sml.jpg)
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 840 of 1342
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Section 21 Serial Communication Interface with FIFO (SCIF)
(5)
Figure 21.19 shows a sample flowchart for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
When switching the operating mode from asynchronous mode to clocked synchronous mode
without initializing the SCIF, make sure that the ORER, PER7 to PER0, and FER7 to FER0 flags
are cleared to 0.
Rev.1.00 Dec. 13, 2005 Page 788 of 1286
REJ09B0158-0100
Serial Data Reception (Clocked Synchronous Mode)
No
No
Read ORER flag in SCLSR
Clear RE bit in SCSCR to 0
Read RDF flag in SCFSR
SCFRDR, and clear RDF
Figure 21.19 Sample Serial Reception Flowchart (1)
Read receive data in
flag in SCFSR to 0
All data received?
Start of reception
End of reception
ORER = 1?
RDF = 1?
No
Yes
Yes
Error handling
[2]
[3]
Yes
[1]
[1] Receive error handling:
[2] SCIF status check and receive data
[3] Serial reception continuation
Read the ORER flag in SCLSR to
identify any error, perform the
appropriate error handling, then clear
the ORER flag to 0.
Transmission/reception cannot be
resumed while the ORER flag is set
to 1.
read:
Read SCFSR and check that RDF =
1, then read the receive data in
SCFRDR, and clear the RDF flag to
0. The transition of the RDF flag from
0 to 1 can also be identified by an
RXI interrupt.
procedure:
To continue serial reception, read at
least the receive trigger set number
of receive data bytes from SCFRDR,
read 1 from the RDF flag, then clear
the RDF flag to 0. The number of
receive data bytes in SCFRDR can
be ascertained by reading SCFRDR.
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