R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 340

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 10 Interrupt Controller (INTC)
INT2B1: Indicates detailed interrupt sources for the RTC.
INT2B2: Indicates detailed interrupt sources for the SCIF.
Rev.1.00 Dec. 13, 2005 Page 288 of 1286
REJ09B0158-0100
Module
RTC
Module
SCIF
Bit
31 to 3
2
1
0
Bit
31 to 8
7
6
5
4
3
2
1
0
Name

CUI
PRI
ATI
Name

TXI1
BRI1
RXI1
ERI1
TXI0
BRI0
RXI0
ERI0
Detailed Source
(Reserved)
These bits are always
read as 0. Writing to these
bits is invalid.
RTC carry interrupt
RTC period interrupt
RTC alarm interrupt
Detailed Source
(Reserved)
These bits are always
read as 0. Writing to these
bits is invalid.
SCIF channel 1 transmit
FIFO data empty interrupt
SCIF channel 1 break
interrupt or overrun error
interrupt
SCIF channel 1 receive
FIFO data full interrupt or
receive data ready
interrupt
SCIF channel 1 receive
error interrupt
SCIF channel 0 transmit
FIFO data empty interrupt
SCIF channel 0 break
interrupt or overrun error
interrupt
SCIF channel 0 receive
FIFO data full interrupt or
receive data ready
interrupt
SCIF channel 0 receive
error interrupt
Description
Indicates RTC interrupt sources.
This register indicates the RTC
interrupt sources even if the mask
setting for RTC interrupts has
been made in the interrupt mask
register.
Description
Indicates SCIF interrupt sources.
This register indicates the SCIF
interrupt sources even if the mask
setting for SCIF interrupts has
been made in the interrupt mask
register.