R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 1104

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 27 NAND Flash Memory Controller (FLCTL)
Rev.1.00 Dec. 13, 2005 Page 1052 of 1286
REJ09B0158-0100
Figure 27.10 NAND Flash Command Access (Flash Read)
Data counter register (FLDTCNTR)
Specify number of bytes of read data to DTCNT [11:0]
Set common control register (FLCMNCR)
ACM [1:0] = 00 (command access mode)
CE0 = 1 (chip enable)
TYPESEL = 1 (select NAND type flash memory)
Set command control register (FLCMDCR)
DOCMD1 = 1 (perform first command stage)
DOADR = 1 (perform address stage)
ADRMD = 1 (address register value is output as
memory address)
ADRCNT [1:0] = 10 (issue 3-byte address)
DOSR = 1 (perform status read)
Set command code register (FLCMCDR)
CMD [7:0] = H'00 (flash read)
Address register (FLADR)
Set address to ADR [7:0], ADR [15:8], ADR [23:16]
Interrupt DMA control register (FLINTDMACR)
Set enable bit of DMA transfer or interrupt request
in use
Set transfer control register (FLTRCR)
TRSTRT=1 (Start flash memory accessing)
Perform flash memory reading
Issue first command
Issue address
Issue second command
Read status
End of flash memory access
FLTRCR.TREND = 0 (clear Processing End Flag)
Read status
Check status (FLBSYCNT.STAT [7:0])
Command access (Flash Read)
FLTRCR.TREND = 1?
END
Yes
No