R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 578

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 PCI Controller (PCIC)
For PCI memory space 0 accesses, bits 23 to 18 of a SuperHyway bus address are controlled by
PCI memory bank mask register 0 (PCIMBMR0).
Note: In the following items and figures, “SH” means the SuperHyway bus of this LSI and
• PCIMBMR0 [23:18] B'1111 11: PCI address [23:18] = SH address [23:18]
• PCIMBMR0 [23:18] B'0111 11: PCI address [23:18] = PCIMBR0 [23], SH address [22:18]
• PCIMBMR0 [23:18] B'0000 01: PCI address [23:18] = PCIMBR0 [23:19], SH address [18]
• PCIMBMR0 [23:18] B'0000 00: PCI address [23:18] = PCIMBR0 [23:18]
The upper eight bits ([31:24]) of a SuperHyway bus address are replaced with bits 31 to 24 in PCI
memory bank register 0 (PCIMBR0).
For PCI memory space 1 accesses, bits 25 to 18 of a SuperHyway address are controlled by PCI
memory bank mask register 1 (PCIMBMR1).
• PCIMBMR1 [25:18] B'11 1111 11: PCI address [25:18] = SH address [25:18]
• PCIMBMR1 [25:18] B'01 1111 11: PCI address [25:18] = PCIMBR1 [25], SH address [24:18]
• PCIMBMR1 [25:18] B'00 0000 01: PCI address [25:18] = PCIMBR1 [25:19], SH address [18]
• PCIMBMR1 [25:18] B'00 0000 00: PCI address [25:18] = PCIMBR1 [25:18]
The upper six bits ([31:26]) of a SuperHyway bus address are replaced with bits 31 to 26 in PCI
memory bank register 1 (PCIMBR1).
Rev.1.00 Dec. 13, 2005 Page 526 of 1286
REJ09B0158-0100
SH address
PCIMBMR0
“PCI” means the PCI local bus.
Figure 13.3 SuperHyway Bus to PCI Local Bus Address Translation
31
31
24 23
24 23
MSBAM0
18 17
18 17
(PCI Memory Space 0)
mask
0
0
PCI address
PCIMBR0
31
31
24 23
24 23
PMSBA0
18 17
18 17
0
0