R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 908
![IC SUPERH MPU ROMLESS 449-BGA](/photos/12/46/124616/r8a77800anbgav_sml.jpg)
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 908 of 1342
- Download datasheet (7Mb)
Section 23 Serial Protocol Interface (HSPI)
Note:
Rev.1.00 Dec. 13, 2005 Page 856 of 1286
REJ09B0158-0100
Bit
3
2
1
0
*
Bit Name
RXOW
RXFL
TXFN
TXFL
These bits are readable/writable bits. When writing 0, these bits are initialized, while
writing 1 is ignored.
0
0
Initial
Value
0
0
R/W
R/W*
R
R
R
Description
Receive Buffer Overrun Warning Flag
This status flag is set to 1 when a new serial data
transfer starts and the previous received data has not
been read from SPRBR. The RXOW remain set to 1
until writing a 0 to its bit position.
If RXOW= 1 and ROIE = 1 then the interrupt is
generated.
Receive Buffer Full Status Flag
This status flag indicates that new data is available in
the SPRBR and has not yet been read. It is set to 1 at
the completion of a serial bus transfer at the point the
shift register contents are loaded into the SPRBR. This
bit is cleared to 0 by reading SPRBR.
If RXFL = 1 and RXDE = 1 then the DMA transfer
request enabled.
Transmit Complete Status Flag
This status flag indicates that the last transmission has
completed. It is set to 1 when SPTBR is able to write
more data from the peripheral bus. This bit is cleared to
0 by writing more data SPTBR.
If TXFN = 1 and TFIE = 1 then the interrupt is
generated.
Transmit Buffer Full Status Flag
This status flag indicates SPTBR has transmitted data.
It is set to 1 when SPTBR is written with data from the
peripheral bus. This bit is cleared to 0 when SPTBR is
able to accept more data from the peripheral bus.
If TXFL = 0 (i.e. the SPTBR is empty) and TXDE = 1
then the DMA transfer request enabled.
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