R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 213

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit
31 to 26
25, 24
23 to 18
Bit Name
LRUI

URB
Initial
Value
All 0
All 0
All 0
R/W
R/W
R
R/W
Description
These bits indicate the ITLB entry to be replaced. The
LRU (least recently used) method is used to decide
the ITLB entry to be replaced in the event of an ITLB
miss. The entry to be purged from the ITLB can be
confirmed using the LRUI bits.
LRUI is updated by means of the algorithm shown
below. X means that updating is not performed.
000XXX: ITLB entry 0 is used
1XX00X: ITLB entry 1 is used
X1X1X0: ITLB entry 2 is used
XX1X11: ITLB entry 3 is used
XXXXXX: Other than above
When the LRUI bit settings are as shown below, the
corresponding ITLB entry is updated by an ITLB miss.
Ensure that values for which "Setting prohibited" is
indicated below are not set at the discretion of
software. After a power-on or manual reset, the LRUI
bits are initialized to 0, and therefore a prohibited
setting is never made by a hardware update.
X means "don't care".
111XXX: ITLB entry 0 is updated
0XX11X: ITLB entry 1 is updated
X0X0X1: ITLB entry 2 is updated
XX0X00: ITLB entry 3 is updated
Other than above: Setting prohibited
Reserved
These bits are always read as 0. The write value
should always be 0.
UTLB Replace Boundary
These bits indicate the UTLB entry boundary at which
replacement is to be performed. Valid only when URB
≠ 0.
Least Recently Used ITLB
Section 7 Memory Management Unit (MMU)
Rev.1.00 Dec. 13, 2005 Page 161 of 1286
REJ09B0158-0100