R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 394

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 11 Local Bus State Controller (LBSC)
11.4.4
CSnWCR (n = 0 to 2, 4 to 6) are 32-bit readable/writable registers that specify the number of wait
cycles to be inserted, the pitch of data access for burst memory accesses, and the number of cycles
to be inserted for the address setup time to the read/write strobe assertion or for the data hold time
from the write strobe negation.
CSnBCR is initialized to H'7777 770F by a power-on reset, but is not initialized by a manual reset.
Rev.1.00 Dec. 13, 2005 Page 342 of 1286
REJ09B0158-0100
Initial value:
Initial value:
Bit
31
30 to 28 ADS
R/W:
R/W:
Bit:
Bit:
CSn Wait Control Register (CSnWCR)
Bit Name

31
15


R
R
0
0
R/W
R/W
30
14
1
1
WTS
ADS
R/W
R/W
29
13
1
1
Initial
Value
0
111
R/W
R/W
28
12
1
1
R/W
R/W
R
R/W
27

11

R
0
0
R/W
R/W
26
10
1
1
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Address Setup Cycle
Specify the number of cycles to be inserted to ensure
the address setup time to the CSn assertion. (Available
only when the SRAM interface, byte control SRAM
interface, or burst ROM interface is selected.)
Clear to 0 when using PCMCIA interface.
000: No cycle inserted
001: 1 cycle inserted
010: 2 cycles inserted
011: 3 cycles inserted
100: 4 cycles inserted
101: 5 cycles inserted
110: 6 cycles inserted
111: 7 cycles inserted
WTH
ADH
R/W
R/W
25
1
9
1
R/W
R/W
24
1
8
1
23


R
R
0
7
0
R/W
R/W
22
1
6
0
RDS
BSH
R/W
R/W
21
1
5
0
R/W
R/W
20
1
4
0
R/W
19

R
0
3
1
R/W
R/W
18
1
2
1
IW[3:0]
RDH
R/W
R/W
17
1
1
1
R/W
R/W
16
1
0
1