R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 763
![IC SUPERH MPU ROMLESS 449-BGA](/photos/12/46/124616/r8a77800anbgav_sml.jpg)
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 20.3 Register States of RTC in Each Processing Mode
Notes: 1. The ENB bit in each register is initialized.
Register Name
64 Hz counter
Second counter
Minute counter
Hour counter
Day-of-week counter
Day counter
Month counter
Year counter
Second alarm register
Minute alarm register
Hour alarm register
Day-of-week alarm register RWKAR
Day alarm register
Month alarm register
RTC control register 1
RTC control register 2
RTC control register 3
Year alarm register
2. Bits other than the RTCEN bit and START bit are initialized.
3. The value of the CF bit and AF bit is undefined.
4. The value of the PEF bit is undefined.
Abbreviation Initial Value
RSECCNT
RMINCNT
RDAYCNT
RMONCNT Undefined
RMINAR
RHRAR
RDAYAR
RMONAR
RCR1
RCR2
RCR3
RYRAR
R64CNT
RHRCNT
RWKCNT
RYRCNT
RSECAR
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined*
Undefined*
Undefined*
Undefined*
Undefined*
Undefined*
H'00*
H'09*
H'00
Undefined
3
4
1
1
1
1
1
1
Power-on
Reset
Counts
Counts
Counts
Counts
Counts
Counts
Counts
Counts
Initialized*
Initialized*
Initialized*
Initialized*
Initialized*
Initialized*
Initialized
Initialized
Initialized
Retained
Rev.1.00 Dec. 13, 2005 Page 711 of 1286
1
1
1
1
1
1
Section 20 Realtime Clock (RTC)
Manual Reset Sleep
Counts
Counts
Counts
Counts
Counts
Counts
Counts
Counts
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized*
Retained
Retained
REJ09B0158-0100
2
Counts
Counts
Counts
Counts
Counts
Counts
Counts
Counts
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
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