R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 28

IC SUPERH MPU ROMLESS 449-BGA

R8A77800ANBGAV

Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77800ANBGAV

Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
29.6 Usage Notes ..................................................................................................................... 1132
Section 30 User Debugging Interface (H-UDI)............................................... 1135
30.1 Features............................................................................................................................ 1135
30.2 Input/Output Pins............................................................................................................. 1137
30.3 Boundary Scan TAP Controllers
30.4 Register Descriptions....................................................................................................... 1140
30.5 Operation ......................................................................................................................... 1152
30.6 Usage Notes ..................................................................................................................... 1154
Section 31 Electrical Characteristics ............................................................... 1155
31.1 Absolute Maximum Ratings ............................................................................................ 1155
31.2 DC Characteristics ........................................................................................................... 1156
31.3 AC Characteristics ........................................................................................................... 1159
Rev.1.00 Dec. 13, 2005 Page xxvi of l
(IDCODE, EXTEST, SAMPLE/PRELOAD, and BYPASS) .......................................... 1138
30.4.1 Instruction Register (SDIR) ................................................................................ 1141
30.4.2 Interrupt Source Register (SDINT)..................................................................... 1142
30.4.3 Bypass Register (SDBPR) .................................................................................. 1142
30.4.4 Boundary Scan Register (SDBSR) ..................................................................... 1143
30.5.1 TAP Control ....................................................................................................... 1152
30.5.2 H-UDI Reset ....................................................................................................... 1153
30.5.3 H-UDI Interrupt .................................................................................................. 1153
31.3.1 Clock and Control Signal Timing ....................................................................... 1160
31.3.2 Control Signal Timing ........................................................................................ 1163
31.3.3 Bus Timing ......................................................................................................... 1164
31.3.4 DDRIF Signal Timing ........................................................................................ 1182
31.3.5 INTC Module Signal Timing.............................................................................. 1186
31.3.6 PCIC Module Signal Timing .............................................................................. 1188
31.3.7 DMAC Module Signal Timing ........................................................................... 1190
31.3.8 TMU Module Signal Timing .............................................................................. 1191
31.3.9 CMT Module Signal Timing .............................................................................. 1192
31.3.10 SCIF Module Signal Timing............................................................................... 1193
31.3.11 SIOF Module Signal Timing .............................................................................. 1195
31.3.12 HSPI Module Signal Timing .............................................................................. 1199
31.3.13 MMCIF Module Signal Timing.......................................................................... 1201
31.3.14 HAC Interface Module Signal Timing ............................................................... 1203
31.3.15 SSI Interface Module Signal Timing .................................................................. 1205
31.3.16 FLCTL Module Signal Timing........................................................................... 1207
31.3.17 GPIO Signal Timing ........................................................................................... 1211
31.3.18 H-UDI Module Signal Timing............................................................................ 1212

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