R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 359

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Note:
FLCTL
GPIO
Interrupt Source
*
FLSTE*
FLTEND*
FLTRQ0*
FLTRQ1*
GPIOI0 (Port E0)
GPIOI0 (Port E1)
GPIOI0 (Port E2)
GPIOI1 (Port E3)
GPIOI1 (Port E4)
GPIOI1 (Port E5)
GPIOI2 (Port H0)
GPIOI2 (Port H1)
GPIOI2 (Port J0)
GPIOI2 (Port K4)
GPIOI3 (Port K5)
GPIOI3 (Port E6)
ITI: Interval timer interrupt
TUNI0 to TUNI5: TMU channels 0 to 5 under flow interrupt
TICPI2: TMU channel 2 input capture interrupt
DMINT0 to DMINT11: Transfer end or half-end interrupts for DMAC channel 0 to 11
DMAE: DMAC address error interrupt (channel 0 to 11)
ERI0, ERI1: SCIF channel 0, 1 receive error interrupts
RXI0, RXI1: SCIF channel 0, 1 receive data full interrupts
BRI0, BRI1: SCIF channel 0, 1 break interrupts
TXI0, TXI1: SCIF channel 0, 1 transmission data empty interrupts
FLSTE: FLCTL error interrupt
FLTEND: FLCTL error interrupt
FLTRQ0: FLCTL data FIFO transfer request interrupt
FLTRQ1: FLCTL control code FIFO transfer request interrupt
INTEVT
Code
H'F00
H'F20
H'F40
H'F60
H'F80
H'FA0
H'FC0
H'FE0
Interrupt
Priority
INT2PRI7
[28:24]
INT2PRI7
[20:16]
Mask/Clear
Register & Bit
INT2MSKR[24]
INT2MSKCR[24]
INT2MSKR[25]
INT2MSKCR[25]
Rev.1.00 Dec. 13, 2005 Page 307 of 1286
Interrupt
Source
Register
INT2A0[24]
INT2A1[24]
INT2A0[25]
INT2A1[25]
Section 10 Interrupt Controller (INTC)
Detail
Source
Register
INT2B6[0]
INT2B6[1]
INT2B6[2]
INT2B6[3]
INT2B7[0]
INT2B7[1]
INT2B7[2]
INT2B7[8]
INT2B7[9]
INT2B7[10]
INT2B7[16]
INT2B7[17]
INT2B7[18]
INT2B7[19]
INT2B7[24]
INT2B7[25] Low
REJ09B0158-0100
Priority
within
Sets of
Sources
High
Low
High
Default
Priority
High
Low