R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 531

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

(27) PCIPMCSR Bridge Support Extension Register (PCIPMCSRBSE)
This register supports PCI bridge specific functionality and is required for all PCI-to-PCI bridges.
Bit
7
6
5 to 0
Bit Name
BPCCEN
B2B3N

Initial value:
Initial
Value
0
0
All 0
PCI R/W:
SH R/W:
Bit:
R/W
SH: R
PCI: R
SH: R
PCI: R
SH: R
PCI: R
BPC
CEN
R
R
7
0
B2B3N
R
R
6
0
Description
When the bus power/clock control mechanism is
disabled, the power state bits in bridge's PCIPMCSR
cannot be used by the system software to control the
power or clock of the bridge's secondary bus.
The state of this bit determines the action that is to
occur as a direct result of programming the function to
the D3 hot state.
0: Indicates that when the bridge function is set to the
1: Indicates that when the bridge function is set to the
This bit is only valid if bit 7 (BPCCEN) is set to 1.
Reserved
These bits are always read as 0. The write value
should always be 0.
—
R
R
5
0
D3 hot state, its secondary bus will have its power
removed (B3).
D3 hot state, its secondary bus's PCI clock will be
stopped (B2).
—
R
R
4
0
—
R
R
3
0
Rev.1.00 Dec. 13, 2005 Page 479 of 1286
—
R
R
2
0
—
R
R
1
0
Section 13 PCI Controller (PCIC)
—
R
R
0
0
REJ09B0158-0100