R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 1197
![IC SUPERH MPU ROMLESS 449-BGA](/photos/12/46/124616/r8a77800anbgav_sml.jpg)
R8A77800ANBGAV
Manufacturer Part Number
R8A77800ANBGAV
Description
IC SUPERH MPU ROMLESS 449-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77800ANBGV.pdf
(1342 pages)
Specifications of R8A77800ANBGAV
Core Processor
SH-4A
Core Size
32-Bit
Speed
400MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
75
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.35 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
449-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77800ANBGAV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1197 of 1342
- Download datasheet (7Mb)
Number
415
414
413
412
411
410
409
408
407
406
405
404
403
402
401
400
399
398
397
396
395
394
393
392
391
390
389
388
387
386
385
384
383
Pin Name
A3
A3
A2
A2
A2
A1
A1
A1
A0
A0
A0
D31
D31
D31
D30
D30
D30
D29
D29
D29
D28
D28
D28
D27
D27
D27
D26
D26
D26
D25
D25
D25
D24
Output
Output
Output
I/O*
Control
Input
Control
Input
Control
Input
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Number
382
381
380
379
378
377
376
375
374
373
372
371
370
369
368
367
366
365
364
363
362
361
360
359
358
357
356
355
354
353
352
351
350
Section 30 User Debugging Interface (H-UDI)
Rev.1.00 Dec. 13, 2005 Page 1145 of 1286
Pin Name
D24
D24
WE3/IOWR
WE3/IOWR
WE3/IOWR
D23
D23
D23
D22
D22
D22
D21
D21
D21
D20
D20
D20
D19
D19
D19
D18
D18
D18
D17
D17
D17
D15
D15
D15
D16
D16
D16
WE2/IORD
REJ09B0158-0100
I/O*
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
Control
Input
Output
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