R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 383

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

11.4.1
MMSELR is a 32-bit register that selects memory address maps for areas 2 to 5. This register
should be accessed at the address H'FF40 0020 in longword. Writing is accepted only when the
upper 16-bit data is H'A5A5 to prevent unintentional writing. The upper 29 bits are always read as
0. This register is initialized by a power-on reset or a manual reset.
Initial value:
Initial value:
Bit
31 to 16 
15 to 3
R/W:
R/W:
Bit:
Bit:
Memory Address Map Select Register (MMSELR)
Bit Name

R/W
31
15


R
0
0
R/W
30
14


R
0
0
R/W
29
13


R
0
0
Initial
Value
All 0
All 0
R/W
28
12


R
0
0
R/W
R/W
R/W
R
27
11


R
0
0
R/W
26
10


R
0
0
Description
Reserved
Set these bits to H'A5A5 only when writing to AREASEL
bits in this register.
These bits are always read as 0.
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W
25


R
0
9
0
R/W
24


R
0
8
0
R/W
23


R
0
7
0
Section 11 Local Bus State Controller (LBSC)
Rev.1.00 Dec. 13, 2005 Page 331 of 1286
R/W
22


R
0
6
0
R/W
21


R
0
5
0
R/W
20


R
0
4
0
R/W
19


R
0
3
0
REJ09B0158-0100
R/W
R/W
18

0
2
0
AREASEL
R/W
R/W
17

0
1
0
R/W
R/W
16

0
0
0