R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 57

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Item
Interrupt controller
(INTC)
User break
controller (UBC)
Local bus state
controller (LBSC)
DDR-SDRAM
interface (DDRIF)
Features
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The following modules can issue on-chip module interrupts:
TMU, RTC, SCIF, WDT, H-UDI, DMAC, CMT, HAC, PCIC, SIOF, HSPI,
MMCIF, SSI, FLCTL, and GPIO
Nine independent external interrupts: NMI and IRQ7 to IRQ0
 NMI: Fall/rise selectable
 IRQ: Fall/rise/high level/low level selectable
15-level signed external interrupts: IRL3 to IRL0, or IRL7 to IRL4
On-chip module interrupts: Priority level can be set for each module
Supports debugging by means of user break interrupts
Two break channels
Address, data value, access type, and data size are available as break
condition settings
Supports sequential break functions
Supports external memory access
External memory space divided into seven areas, each of up to 64
Mbytes, with the following parameters settable for each area:
 Bus size (8, 16, or 32 bits)
 Number of wait cycles (hardware wait function also supported)
 SRAM or burst ROM
 Supports PCMCIA interface (only in little endian mode)
Big endian or little endian mode can be set
The data bus width of the DDRIF is 32 bits
Supports DDR-SDRAM self-refreshing
Supports the DDR320 or DDR266 SDRAM
Efficient data transfer is possible using the SuperHyway bus(Internal
bus)
Supports a 4-bank DDR-SDRAM
Supports a burst length of 2
Connectable memory size: 256-Mbit, 512-Mbit, 1-Gbit, and 2-Gbit
Rev.1.00 Dec. 13, 2005 Page 5 of 1286
Section 1 Overview
REJ09B0158-0100