R8A77800ANBGAV Renesas Electronics America, R8A77800ANBGAV Datasheet - Page 1133

• Manufacturer Part Number: R8A77800ANBGAV
• Description: IC SUPERH MPU ROMLESS 449-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77800ANBGAV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 75
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.35 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 449-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

28.2.13 Port A Data Register (PADR)
PADR is an 8-bit readable/writable register that stores port A data.
28.2.14 Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores port B data.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
PA7DT
PA6DT
PA5DT
PA4DT
PA3DT
PA2DT
PA1DT
PA0DT
Bit Name
PB7DT
PB6DT
PB5DT
PB4DT
PB3DT
PB2DT
PB1DT
PB0DT
Initial value:
Initial value:
Initial
value
0
0
0
0
0
0
0
0
Initial
value
0
0
0
0
0
0
0
0
R/W:
R/W:
Bit:
Bit:
PA7DT
PB7DT
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
0
7
0
PA6DT
PB6DT
R/W
R/W
6
0
6
0
Description
These bits store output data of a pin which is used as a
general output port. When the pin functions as a
general output port, if the port is read, the value of this
corresponding register will be read out. When the pin
functions as a general input port, if the port is read, the
status of the corresponding pin will be read out.
Description
These bits store output data of a pin which is used as a
general output port. When the pin functions as a
general output port, if the port is read, the value of this
corresponding register will be read out. When the pin
functions as a general input port, if the port is read, the
status of the corresponding pin will be read out.
PA5DT
PB5DT
R/W
R/W
5
0
5
0
PA4DT
PB4DT
R/W
R/W
4
0
4
0
PA3DT
PB3DT
R/W
R/W
3
0
3
0
Rev.1.00 Dec. 13, 2005 Page 1081 of 1286
PA2DT
PB2DT
R/W
R/W
2
0
2
0
Section 28 General Purpose I/O (GPIO)
PA1DT
PB1DT
R/W
R/W
1
0
1
0
PA0DT
PB0DT
R/W
R/W
0
0
0
0
REJ09B0158-0100