PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 11

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
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10.22 JTAG Test Access Port Interface .................................................................... 109
10.23 Microprocessor Interface ................................................................................ 109
12.1 Master Test and Test Configuration Registers................................................ 496
12.2 JTAG Test Port................................................................................................ 501
12.3 Boundary Scan Cells ...................................................................................... 508
13.1 APS Serial TelecomBus (LVDS) Operation .................................................... 511
13.2 Cross Connect Mode of Operation ................................................................. 516
13.3 SONET/SDH Frame Mappings and Overhead Byte Usage ........................... 519
13.4 ATM Cell Data Structure ................................................................................. 523
13.5 POS/HDLC Data Structure ............................................................................. 523
Normal Mode Register Description ......................................................................... 124
Test Features Description ....................................................................................... 496
Operation................................................................................................................. 511
10.21.3 ......................................................... LVDS Transmit Reference (TXREF)
10.21.4 ......................................................................Clock Synthesis Unit (CSU)
13.1.1 LVDS Overview .................................................................................... 511
13.1.2 LVDS Receiver (RXLV)......................................................................... 512
13.1.3 Data Recovery Unit (DRU) ................................................................... 512
13.1.4 Receive 8B/10B TelecomBus Decoder (R8TD).................................... 512
13.1.5 Transmit 8B/10B TelecomBus Encoder (T8TE) ................................... 513
13.1.6 APS Parallel to Serial Converter (APISO)............................................ 514
13.1.7 LVDS Transmitter (TXLV) ..................................................................... 514
13.1.8 Character Alignment ............................................................................. 514
13.1.9 Frame Alignment .................................................................................. 514
13.1.10 .....................................................................................Character Decode
13.1.11 ..................................................................................... Character Encode
13.1.12 ................................................ Serial TelecomBus MST and HPT Modes
13.3.1 ATM Mapping ....................................................................................... 519
13.3.2 Packet Over SONET Mapping.............................................................. 519
13.3.3 Transport and Path Overhead Bytes .................................................... 520
13.5.1 Limitation When Using Externally Generated FCS In STS-48c Mode . 524
13.5.2 Limitations From Small Packets ........................................................... 524
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S/UNI-2488 Telecom Standard Product Datasheet
Released
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