PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 97

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PM5381-BI

Manufacturer Part Number
PM5381-BI
Description
ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
Manufacturer
PMC-Sierra, Inc.
Datasheet

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10.11 SONET/SDH Transmit Line Interface (STLI)
10.12 Transmit Regenerator Multiplexer Processor (TRMP)
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Figure 17 Jitter transfer for the low frequency region
The Parallel to Serial Converter (PISO) converts the transmit byte serial stream to a bit serial
stream. The transmit bit serial stream appears on the TXD_P/ TXD_N PECL outputs.
An unframed PRBS pattern can optionally be inserted on the transmit line. The PRBS is based on
the X
(LFSR).
The SONET/SDH transmit line interface block properly formats the outgoing 2488 Mbit/s data
stream. This block interfaces the TRMP to the Tx Line Interface block.
The Transmit Regenerator and Multiplexer Processor (TRMP) block inserts the transport
overhead bytes in the transmit data stream.
-0.1
-0.2
-0.3
-0.4
-0.5
0.2
0.1
23
10000
0
+X
18
+1 polynomial (PRBS^23) and is implemented by a Linear Feedback Shift Register
PASS Mask
10% Nominal
100% Nominal
High Voltage, 85C, 100%
Low Voltage, 85C, 100%
Low Voltage, -40C, 100%
High Voltage, -40C, 100%
Jitter Transfer
Frequency [Hz]
100000
S/UNI-2488 Telecom Standard Product Datasheet
1000000
Released
97

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