PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 298

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Indirect Register 08H: THPP Transmit Z4 and Z5 Overhead (TZ4Z5POH)
Z5[7:0]
Z4[7:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The Z5[7:0] bits are inserted in the Z5 byte position when the SRCZ5 bit of the THPP Source
and Pointer Control Register is logic 0 and input TPOHEN is low during the path Z5 growth
bit positions in the path overhead input stream, TPOH. Z5[7:0] is inserted into the Z5
position of the POH when register insertion is enabled. See Table 6 Path Overhead Byte
Source Priority for details.
This field is only valid for THPP STS-1/STM0 #1.
The Z4[7:0] bits are inserted in the Z4 byte position when the SRCZ4 bit of the THPP Source
and Pointer Control Register is logic 0 and input TPOHEN is low during the path Z4 growth
bit positions in the path overhead input stream, TPOH. Z4[7:0] is inserted into the Z4
position of the POH when register insertion is enabled. See Table 6 Path Overhead Byte
Source Priority for details.
This field is only valid for THPP STS-1/STM0 #1.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Z4[7]
Z4[6]
Z4[5]
Z4[4]
Z4[3]
Z4[2]
Z4[1]
Z4[0]
Z5[7]
Z5[6]
Z5[5]
Z5[4]
Z5[3]
Z5[2]
Z5[1]
Z5[0]
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
S/UNI-2488 Telecom Standard Product Datasheet
Released
298