PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 241

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Indirect Register 80H to BFH: RTTP SECTION Accepted Trace
The RTTP SECTION Accepted Trace Indirect Register is provided at RTTP r/w indirect address
80H to BFH.
ATRACE[7:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The accepted tail trace message (ATRACE[7:0]) bits contain the persistent tail trace message.
When algorithm 2 is selected and PER5 is set to logic 1, the accepted message is the same tail
trace message received for 5 consecutive multi-frames. When algorithm 2 is selected and
PER5 is set to logic 0, the accepted message is the same tail trace message received for 3
consecutive multi-frames. When algorithm 2 is selected and LENGTH16 is set to logic 1, the
accepted message is stored between address 80h and 8Fh. When algorithm 2 is selected and
LENGTH16 is set to logic 0, the accepted message is stored between address 80h and BFh.
When algorithm 3 is selected, the accepted byte is the same tail trace byte received for 48
frames. When algorithm 3 is selected, the accepted byte is stored at address 80h.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
ATRACE[7]
ATRACE[6]
ATRACE[5]
ATRACE[4]
ATRACE[3]
ATRACE[2]
ATRACE[1]
ATRACE[0]
Default
X
X
X
X
X
X
X
X
S/UNI-2488 Telecom Standard Product Datasheet
Released
241