PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 266

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
STS3C[3]
STS3C[4]
STS12C
STS12CSL
The STS-3c (VC-4) payload configuration (STS3C[3]) bit selects the payload configuration.
When STS3C[3] is set to logic 1, the STS-1/STM-0 paths #3, #7 and #11 are part of an
STS-3c (VC-4) payload. When STS3C[3] is set to logic 0, the paths are STS-1 (VC-3)
payloads. The STS12C register bit has precedence over the STS3C[3] register bit.
The STS-3c (VC-4) payload configuration (STS3C[4]) bit selects the payload configuration.
When STS3C[4] is set to logic 1, the STS-1/STM-0 paths #4, #8 and #12 are part of an
STS-3c (VC-4) payload. When STS3C[4] is set to logic 0, the paths are STS-1 (VC-3)
payloads. The STS12C register bit has precedence over the STS3C[4] register bit.
The STS-12c (VC-4-4c) payload configuration (STS12C) bit selects the payload
configuration. When STS12C is set to logic 1, the STS-1/STM-0 paths #1 to #12 are part of
an STS-12c (VC-4-4c) payload. When STS12C is set to logic 0, the STS-1/STM-0 paths are
defined with the STS3C[1:4] register bit. The STS12C register bit has precedence over the
STS3C[1:4] register bit.
The slave STS-12c (VC-4-4c) payload configuration (STS12CSL) bit selects the slave
payload configuration. When STS12CSL is set to logic 1, the STS-1/STM-0 paths #1 to #12
are part of an STS-12c (VC-4-4c) slave payload. When STS12CSL is set to logic 0, the
STS-1/STM-0 paths #1 to # 12 are part of an STS-12c (VC-4-4c) master payload.
S/UNI-2488 Telecom Standard Product Datasheet
Released
266