PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 499

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 2001H: S/UNI-2488 Test Mode Address Force Enable
This register is used to force the address pins to a certain value. These bits are valid when either
PMCTST or PMCATST is set to logic 1. The TM_A[X] bit is forced when TM_A_EN[X] is
logic 1. Otherwise, the A[X] pin is used.
Access to this register is not affected by the Test Mode Address Force functions in registers
2001H and 2002H.
TM_A_EN[12:1]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 1
Bit 1
Bit 0
When TM_A_EN[X] is logic 1 and either PMCTST or PMCATST is logic 1, the TM_A[X]
register bit replaces the input pin A[X]. Like PMCTST and PMCATST, TM_A_EN[12:2]
bits are cleared only when CSB is logic 1 or when they are written to logic 0.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Unused
Unused
Unused
Unused
TM_A_EN[12]
TM_A_EN[11]
TM_A_EN[10]
TM_A_EN[9]
TM_A_EN[8]
TM_A_EN[7]
TM_A_EN[6]
TM_A_EN[5]
TM_A_EN[4]
TM_A_EN[3]
TM_A_EN[2]
TM_A_EN[1]
Function
S/UNI-2488 Telecom Standard Product Datasheet
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Released
499