PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 388

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0756H: TCFP Transmit Byte Counter (LSB)
Register 0757H: TCFP Transmit Byte Counter
Register 0758H: TCFP Transmit Byte Counter (MSB)
TX_BYTE[39:0]
A write to any one of the TCFP counter registers loads the registers with the current counter value
and resets the internal 40 bit counter to between 0 and 8. The counter reset value is dependent on
if there were count events during the transfer of the count to the Transmit Byte Counter registers.
The counter should be polled regularly to avoid saturation.
To allow for synchronization update with all other blocks, writing to register 0000H will initiate a
global performance counter update.
Bit
Bit 15
to
Bit 0
Bit
Bit 15
to
Bit 0
Bit
Bit 15
to
Bit 8
Bit 7
to
Bit 0
The TX_ BYTE[39:0] bits indicate the number of bytes in packets transmitted to the TCFP
egress stream during the last accumulation interval. The byte counts include all user payload
bytes, FCS bytes, and abort bytes. Inclusion of stuffed bytes is controlled by the
TX_BYTE_MODE register bit. HDLC flags are not counted. The TX_BYTE[39:0] counters
are only valid when processing packets.
Type
R
Type
R
Type
R
TX_BYTE[15:0]
TX_BYTE[31:16]
Unused
TX_BYTE[39:32]
Function
Function
Function
S/UNI-2488 Telecom Standard Product Datasheet
Default
XXXX
Default
XXXX
Default
XX
XX
Released
388