PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 96

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

10.10 Transmit Line Interface
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
The Transmit Line Interface allows the S/UNI-2488 to directly interface with optical modules
(ODLs) or other medium interfaces. This block performs clock synthesis and performs parallel to
serial conversion of the incoming outgoing 2488.32 Mbit/s data stream.
The transmit clock is synthesized from a 155.52. MHz reference. The transfer function yields a
typical low pass corner of 20 MHz above which reference jitter is attenuated at
–12 dB per octave. The design of the loop filter and PLL is optimized for minimum intrinsic
jitter. With a jitter-free 155.52MHz reference, the intrinsic jitter is less than 0.01 UI RMS when
measured using a band-pass filter with 12KHz – 20MHz cutoff corner frequencies. In practice,
jitter on REFCLK_P / REFCLK_N must be less than 1 psec RMS in 12KHz – 20MHz band in
order for S/UNI2488 to comply with GR-253-CORE intrinsic jitter specification. The REFCLK
reference should be within ±20 ppm to meet the SONET free-run accuracy requirements specified
in GR-253-CORE.
When configured in loop-timed mode, the S/UNI-2488 meets the jitter transfer requirements.
The results of jitter transfer tests are shown in Figure 16 and Figure 17.
Figure 16 Jitter transfer results
-10
-15
-20
-25
-30
-35
-40
-5
10000
5
0
PASS Mask
10% Nominal
100% Nominal
High Voltage, 85C, 100%
Low Voltage, 85C, 100%
Low Voltage, -40C, 100%
High Voltage, -40C, 100%
100000
Jitter Transfer
Frequency [Hz]
S/UNI-2488 Telecom Standard Product Datasheet
1000000
Released
10000000
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