PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 149

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
TLD_VAL
LOCK0
APSIFP_THRESH[7:0]
The TLD value (TLD_VAL) bit is used to set the value optionally inserted into the line DCC
(D4-D12) in the transmit data stream as configured using the TLDEN bit in the TRMP
Configuration register. When set to logic 1, ones are inserted. When set to logic 0, zeros are
inserted.
This bit controls the generation of the J1 Path Overhead Byte location for the transmit
direction, and thus, the H1 H2 pointer value for the transmit direction. When set to logic 0,
the H1 H2 pointer value is set at 522. This is the normal pointer location for ATM
configuration (as specified by the ATM Forum). When set to logic 1, the H1 H2 pointer value
is set at 0.
APSIFP_THRESH determines the amount of slack allowed in the comparison between the
internal transmit frame pulse and the input APSIFP before the internal frame pulse is forced
to match the APSIFP. This value is only used when RESYNC_EN in register 0002H is logic
1. The minimum value for APSIFP_THRESH is 4. This field should normally be set to the
minimum value (4) to reduce the probability of synchronization problems with APSIFP.
S/UNI-2488 Telecom Standard Product Datasheet
Released
149