PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 457

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
LCVI
FUOI
The line code violation event interrupt status bit (LCVI) reports and acknowledges line code
violation interrupts. Interrupts are generated when the character alignment block detects a
line code violation in the incoming data stream. LCVI is set high when a line code violation
event is detected. When the interrupt is masked by the LCVE bit, the LCVI remains valid and
may be polled to detect change of frame alignment events. If WCIMODE is set to logic 1,
only over-writing with a ‘1’ clears this bit. If WCIMODE is set to logic 0, then a read of this
register automatically clears the bit.
The FIFO underrun/overrun event interrupt status bit (FUOI) reports and acknowledges the
FIFO underrun/overrun interrupts. Interrupts are generated when the character alignment
block detects a that the read and write pointers are within one of each other. FUOI is set high
when this event is detected. When the interrupt is masked by the FUOE bit, the FUOI
remains valid and may be polled to detect underrun/overrun events. If WCIMODE is set to
logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set to logic 0, then a read
of this register automatically clears the bit.
S/UNI-2488 Telecom Standard Product Datasheet
Released
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