PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 79

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

10.4
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
A maskable interrupt is activated to indicate any change in the status of out of frame (OOF), loss
of frame (LOF), loss of signal (LOS), line remote defect indication (RDI-L), line alarm indication
signal (AIS-L), synchronization status message (COSSM), APS bytes (COAPS) and APS byte
failure (APSBF) or any errors in section BIP-8, line BIP-8 and line remote error indication (REI-
L).
The RRMP block provides de-scrambled data and frame alignment indication signals for use by
the RHPP.
Receive Tail Trace Processor (RTTP)
The Receive Tail Trace Processor (RTTP) block monitors the tail trace messages of the receive
data stream for trace identifier unstable (TIU) defect and trace identifier mismatch (TIM) defect.
The synchronization mechanism is different for a 16 byte message and for a 64 byte message.
When the message is 16 bytes, the synchronization is based on the MSB of the tail trace byte.
Only one of the 16 bytes has MSB set high. The byte with MSB set high is considered the first
byte of the message. When the message is 64 bytes, the synchronization is based on the CR/LF
(CR = ODh, LF = OAh) characters of the tail trace message. The byte following the CR/LF bytes
is considered the first byte of the message.
Three tail trace algorithms are defined.
The first algorithm is BELLCORE compliant. The algorithm detects trace identifier mismatch
(TIM) defect on a 16 or 64 byte tail trace message. A TIM defect is declared when none of the
last 20 messages matches the expected message. A TIM defect is removed when 16 of the last 20
messages match the expected message. The expected tail trace message is a static message
written in the expected page of the RTTP by an external microprocessor. Optionally, the expected
message is matched when the tail trace message is all zeros. TIM is always 0. Note that TIM is
not used in BELLCORE compliance.
The second algorithm is ITU compliant. The algorithm detects trace identifier unstable (TIU)
defect and trace identifier mismatch (TIM) defect on a 16 or 64 byte tail trace message. The
current tail trace message is stored in the captured page of the RTTP. If the length of the message
is 16 bytes, the RTTP synchronizes to the MSB of the message. The byte with the MSB set high
is placed in the first location of the captured page. If the length of the message is 64 bytes, the
RTTP should be set to synchronize to the CR/LF (CR = 0Dh, LF = 0Ah) characters of the
message. The following byte is placed in the first location of the captured page.
A persistent tail trace message is declared when an identical message is received for 3 or 5
consecutive multi-frames (16 or 64 frames). A persistent message becomes the accepted
message. The accepted message is stored in the accepted page of the RTTP. A TIU defect is
declared when one or more erroneous bytes are detected in a total of 8 messages without any
persistent message in between. A TIU defect is removed when a persistent message is received.
S/UNI-2488 Telecom Standard Product Datasheet
Released
79