PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 311

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
FIEN[1]
The FIFO event interrupt enable (FIEN[1]) bit controls the activation of the interrupt (INTB)
output due to a FIFO overflow or a FIFO underflow. When set to logic 1, the corresponding
pending interrupts will assert the interrupt (INTB) output. When set to logic 0, the
corresponding pending interrupts will not assert the interrupt (INTB) output. If WCIMODE
is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set to logic 0,
then a read of this register automatically clears this bit.
S/UNI-2488 Telecom Standard Product Datasheet
Released
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