PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 128

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
APSMUX_TRMP
APSMUX_T8TE
APSMUX_RCFP
The APS MUX_TRMP register bit controls whether data received by the TRMP is sourced
from the THPP (normal operation) or from the R8TD (APSI_P/ APSI_N[4:1]) APS port
(when the S/UNI-2488 is configured as a protect device). When APSMUX_TRMP is a logic
0, the TRMP (normal mode of operation) receives data from the THPP. When
APSMUX_TRMP is a logic 1 (S/UNI-2488 is configured as a protect device), the TRMP
receives data from the R8TD (APSI_P/ APSI_N[4:1]) APS port. Under this mode of
operation the input APS port is expected to contain a bridged transmit SONET stream from a
working mate device. In addition, the S/UNI-2488 will output a received SONET stream on
the output APS port to the same mate device.
The APS MUX_T8TE register bit controls whether or not data from the THPP (normal
operation) or the SVCA (when configured as the protect device) are transmitted over the
T8TE (APSO_P/ APSO_N[4:1]) port. When APSMUX_T8TE is a logic 0, the T8TE
receives data from the THPP (normal mode of operation). When APSMUX_T8TE is a logic
1, the T8TE receives data from the SVCA (S/UNI-2488 is configured as a protect device).
These data are transmitted over the APSO_P/ APSO_N[4:1] port. In this mode, the S/UNI-
2488 receives a SONET stream from a protect mate via the input APS port and presents the
payload out through the POS-PHY Level 3 or UTOPIA Level 3™ interface. The S/UNI-2488
transmits data from its POS-PHY Level 3 or UTOPIA Level 3™ interface out through its
output APS port to a protect mate device. It is assumed that the mate device will transmit
data onto the line.
The APS MUX1_RCFP register bit controls whether or not the RCFP receives data from the
SVCA (normal operation) or from the R8TD (APSI_P/ APSI_N[4:1]) APS Port (when
configured as a working mate during an APS switchover). When APSMUX_RCFP is a logic
0, the RCFP receives data normally from the SVCA. When APSMUX_RCFP is a logic 1, the
RCFP receives data from the R8TD APS Port. This register bit would be set if the S/UNI-
2488 is configured as a working device during an APS failure condition.
S/UNI-2488 Telecom Standard Product Datasheet
Released
128