PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 302

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0602H, 0622H, 0642H, 0662H: SVCA Payload Configuration Register
In normal mode operation this register is reserved. Use default values.
In the XCONNECT mode of operation of the S/UNI-2488, the STS3C[4:1] register bits are
defined as follows:
STS3C[1]
STS3C[2]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The STS-3c (VC-4) payload configuration (STS3C[1]) bit selects the payload configuration.
When STS3C[1] is set to logic 1, the STS-1/STM-0 paths #1, #5 and #9 are part of a STS-3c
(VC-4) payload. When STS3C[1] is set to logic 0, the paths are STS-1 (VC-3) payloads. The
STS12C register bit has precedence over the STS3C[1] register bit.
The STS-3c (VC-4) payload configuration (STS3C[2]) bit selects the payload configuration.
When STS3C[2] is set to logic 1, the STS-1/STM-0 paths #2, #6 and #10 are part of a STS-3c
(VC-4) payload. When STS3C[2] is set to logic 0, the paths are STS-1 (VC-3) payloads. The
STS12C register bit has precedence over the STS3C[2] register bit.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
SLAVE
STS12C
Unused
Unused
Unused
Unused
Unused
Unused
Reserved
Reserved
Reserved
Reserved
STS3C[4]
STS3C[3]
STS3C[2]
STS3C[1]
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
0
0
0
0
0
0
Released
302