PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 387

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0754H: TCFP Transmit Cell/Packet Counter (LSB)
Register 0755H: TCFP Transmit Cell/Packet Counter (MSB)
TX_CELL[31:0]
A write to any one of the TCFP Transmit Cell/Packet Counter registers loads the registers with
the current counter value and resets the internal 32 bit counter to 1 or 0. The counter reset value
is dependent on if there was a count event during the transfer of the count to the Transmit
Cell/Packet Counter registers. The counter should be polled regularly to avoid saturation.
To allow for synchronization update with all other blocks, writing to register 0000H will initiate a
global performance counter update.
Bit
Bit 15
to
Bit 0
Bit
Bit 15
to
Bit 0
The TX_CELL[31:0] bits indicate the number of cells or non-aborted packets transmitted to
the TCFP egress stream during the last accumulation interval. ATM Idle cells, HDLC flags,
and HDLC Abort bytes inserted into the transmission stream are not counted.
Type
R
Type
R
TX_CELL[15:0]
TX_CELL[31:16]
Function
Function
S/UNI-2488 Telecom Standard Product Datasheet
Default
XXXX
Default
XXXX
Released
387