PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 514

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

13.1.6
13.1.7
13.1.8
13.1.9
13.1.10 Character Decode
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
APS Parallel to Serial Converter (APISO)
The APISO is a parallel-to-serial converter designed for high-speed transmit operation,
supporting up to 777.6 Mb/s.
LVDS Transmitter (TXLV)
The TXLV is a 777.6 Mb/s Low Voltage Differential Signaling (LVDS) Transmitter according to
the IEEE 1596.3-1996 LVDS Specification. The TXLV accepts 777.6 Mbit/s differential data
from the APSIO circuit and transmits the data off-chip as a low voltage differential signal. The
TXLV uses the reference current and voltage from the TXLVREF to control the output
differential voltage amplitude and the output common-mode voltage.
Character Alignment
The character alignment sub-block locates character boundaries in the incoming Serial
TelecomBus 8B/10B data stream. The framer logic may be in one of two states, SYNC state and
HUNT state. It uses the 8B/10B control character (K28.5) which encodes the SONET/SDH J0
byte to locate character boundaries and to enter the SYNC state. It monitors the receive data
stream for line code violations (LCV). An LCV is declared when the running disparity of the
receive data is not consistent with the previous character or the data is not one of the characters
defined in IEEE std. 802.3. Excessive LCVs are used to transition the framer logic to the HUNT
state.
Normal operation occurs when the character alignment sub-block is in the SYNC state. 8B/10B
characters are extracted from the FIFO using the character alignment of the K28.5 character that
caused entry to the SYNC state. Mimic K28.5 characters at other alignments are ignored. The
receive data is constantly monitored for line code violations. If 5 or more LCVs are detected in a
window of 15 characters, the character alignment sub-block transitions to the HUNT state. It will
search all possible alignments in the receive data for the K28.5 character. In the mean time, the
original character alignment is maintained until a K28.5 character is found. At that point, the
character alignment is moved to this new location and the sub-block transitions to the SYNC
state.
Frame Alignment
The frame alignment sub-block monitors the data read from the FIFO buffer sub-block for the J0
byte. When the frame counter sub-block indicates the J0 byte position, a J0 character is expected
to be read from the FIFO. If a J0 byte is read out of the FIFO at other byte positions, a J0 byte
error counter is incremented. When the counter reaches a count of 3, the frame alignment sub-
block transitions to HUNT state. The next time a J0 character is read from the FIFO, the
associated read address is latched and the sub-block transitions back to the SYNC state. The J0
byte error counter is cleared when a J0 byte is read from the FIFO at the expected position.
The following tables show the extended 8B/10B maps used by the S/UNI-2488. The extended
character set allows the mapping of TelecomBus control bytes and signals into 8B/10B control
characters. The table is divided into two sections, one for each software configurable mode of
operation.
S/UNI-2488 Telecom Standard Product Datasheet
Released
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