PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 489

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0900H: Rx APS J0 FIFO Interrupt Enable
OKJ0xE:
EXJ0xE
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 10
Bit 11
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 1
Bit 1
Bit 0
The APS correct J0 indication interrupt enable bit (OKJ0xE) for APS link number x enables
the assertion of a hardware interrupt on INTB when the corresponding APS link’s J0
character is detected at the expected time. When OKJ0xE is logic 1, the hardware interrupt is
enabled for APS link number x. When OKJ0xE is logic 0, the hardware interrupt is disabled
for APS link number x.
The APS extra J0 indication interrupt enable bit (EXJ0xE) for APS link number x enables the
assertion of a hardware interrupt on INTB when the corresponding APS link’s J0 character is
detected at an unexpected time. When EXJ0xE is logic 1, the hardware interrupt is enabled
for APS link number x. When EXJ0xE is logic 0, the hardware interrupt is disabled for APS
link number x.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Reserved
Reserved
Reserved
Reserved
NOJ04E
NOJ03E
NOJ02E
NOJ01E
OKJ04E
OKJ03E
OKJ02E
OKJ01E
EXJ04E
EXJ03E
EXJ02E
EXJ01E
S/UNI-2488 Telecom Standard Product Datasheet
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
489