PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 501

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

12.2
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 2003H: S/UNI-2488 Reserved Test Register
Reserved
JTAG Test Port
The S/UNI-2488 JTAG Test Access Port (TAP) allows access to the TAP controller and the 4 TAP
registers: instruction, bypass, device identification and boundary scan. Using the TAP, device
input logic levels can be read, device outputs can be forced, the device can be identified and the
device scan path can be bypassed. For more details on the JTAG port, please refer to the
Operations section.
Table 20 Instruction Register (Length - 3 bits)
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Instructions
EXTEST
IDCODE
SAMPLE
BYPASS
BYPASS
STCTEST
BYPASS
The reserved bits should be set to logic 0 for normal tests. They have no affect on the
operation of the device when PMCTST is logic 0.
Type
R/W
R/W
R/W
R/W
R/W
R/W
Selected Register
Boundary Scan
Identification
Boundary Scan
Bypass
Bypass
Boundary Scan
Bypass
Unused
Unused
Unused
Unused
Unused
Unused
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Function
Unused
Unused
Unused
Unused
S/UNI-2488 Telecom Standard Product Datasheet
Instruction Codes, IR[2:0]
000
001
010
011
100
101
110
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Released
501