PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 538

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

13.17 Using the SONET/SDH Alarm Reporting Controller (SARC)
13.17.1 SARC Indirect Register Access
13.17.2 STS-48c Operation
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
1.0e-9
Table 27 BERM Configuration for SONET STS-48c
BER
1.0e-3
1.0e-4
1.0e-5
1.0e-6
1.0e-7
1.0e-8
1.0e-9
The SARC block is used to process STS-48c alarms. All its features, save for one, are dedicated
solely for STS-48c payloads. The one feature where sub-STS-48c channels need to be configured
for the SARC is for AIS-P generation to the APS links when working in x-connect mode. This is
described in Section 13.17.3.
The procedure used to access the SARC’s indirect registers is different from that used in the other
functional blocks of the S/UNI-2488 (as defined in Section 13.19). For STS-48c modes, the user
must write the value 0x0001 to register 0x0720 first. Then, all the other registers (0x0722 to
0x0735) can be written and read as normal registers. For the one configuration where non-STS-
48c channel access is required, the user must write the value of the master timeslot of the STS-Nc
channel to register 0x0720, then program the configurations for that channel to the other registers
(0x0722 to 0x0735). After this is done, then the next STS-Nc channel master timeslot can be
configured. Examples of the configuration are given in the following sections.
In STS-48c mode, one SARC is sufficient to process all the defect consequential actions. To
enable the defect consequential actions, the PATH_REG_EN[0] register bit in register 0x0720
must be set to logic 1. Then, the bits in registers 0x0722 to 0x0731 and 0x0734 must be
configured to enable the desired consequential actions.
Note that conditions to enable AIS-L will make a difference in internal functions only. The
RLAISINSEN bit in register 0x072A should be enabled to allow AIS-L to propagate to AIS-P.
This will allow transmission of an AIS-P signal to the transmit APS links (in x-connect mode) and
to the RCFP cell/packet processor.
10000
Evaluation
Period
0.0025
0.008
0.008
0.0625
0.625
5.2
42
0
CMODE
0
0
0
1
1
1
1
989680
Accumulation
Period
000003
000008
000008
00003F
000271
001450
00A410
S/UNI-2488 Telecom Standard Product Datasheet
2AF8
Detection
Threshold
B97
6BB
0A2
07C
07C
065
04F
A28
Clear
Threshold
25F
0D8
01B
08E
08E
078
062
Released
538